Rapidus Builds Design Partner Network to Attract Custom Chip Orders

A Foundry Looking for Clients Before the Fabs Light Up

Rapidus, the Japanese contract chipmaker that has drawn billions in government backing and considerable scepticism about its 2027 production timeline, has assembled a network of seventeen semiconductor design partners. The consortium includes Toshiba and a mix of design service firms, according to people familiar with the arrangements. The goal is straightforward: help companies that lack in-house chip design capability build their own semiconductors, then capture those manufacturing contracts.

At Opentechwire, we've tracked Rapidus since its formation in 2022, watching it promise sub-2-nanometre logic production at a time when Japan's most advanced domestic fabs were still several nodes behind. The design partner announcement signals a shift in go-to-market strategy. Rather than wait for established fabless chip firms to place orders, Rapidus is offering a bundled service: design expertise plus cutting-edge fabrication, aimed at enterprises in automotive, industrial equipment, and data-centre infrastructure that want custom silicon but have never built a chip team.

The model borrows from TSMC's early playbook, when the Taiwanese foundry worked closely with design houses to cultivate a fabless ecosystem. But Rapidus faces a steeper climb. TSMC built that network over decades, starting with mature nodes and migrating customers up the learning curve. Rapidus is promising 2-nanometre-class process technology from day one, a node that demands not just advanced lithography but tightly integrated design-for-manufacturing workflows that take years to refine.

Why Design Partnerships Matter for a Greenfield Foundry

Foundries live or die by utilisation. A state-of-the-art fab costs upwards of twenty billion dollars to build and equip; every quarter of idle capacity erodes margins and spooks investors - or, in Rapidus's case, the ministries that approved the subsidies. The company has secured commitments from IBM for process technology transfer and from Arm for design ecosystem support, but neither relationship guarantees wafer orders.

By partnering with design service firms, Rapidus can address a segment that traditional foundries often overlook: companies with product ideas but no chip design team. An automotive tier-one supplier wanting a custom AI accelerator for in-cabin sensing, or a robotics manufacturer needing a sensor-fusion chip, might lack the headcount to tape out a design. If Rapidus and its partners can handle architecture, verification, and physical design, the customer gets a differentiated product and Rapidus gets a committed production slot.

The risk is execution. Advanced-node design is not a commodity service. At 2-nanometre geometries, power delivery, thermal management, and electromigration constraints are severe. A design house that has never taped out below 7 nanometres will face a brutal learning curve, and any re-spins push out time-to-market and inflate costs. If early projects stumble, word spreads quickly in the tight-knit semiconductor industry.

Toshiba's Role and Japan's Vertical Re-Integration Push

Toshiba's participation is notable. The conglomerate exited leading-edge logic years ago, selling its foundry assets and focusing on discrete power devices and memory. But Toshiba retains deep semiconductor IP and system integration know-how, particularly in automotive and industrial control. By joining the Rapidus design network, Toshiba can re-enter custom logic without the capital burden of owning a fab, whilst Rapidus gains a partner with established customer relationships across Japan's manufacturing base.

This arrangement reflects a broader policy goal in Tokyo: re-integrate Japan's fragmented semiconductor value chain. For two decades, Japanese chip firms retreated from leading-edge logic, ceding design and manufacturing to Taiwan, South Korea, and the United States. The government's Rapidus bet - alongside subsidies for TSMC's Kumamoto fab and support for equipment makers - aims to rebuild domestic capacity and reduce reliance on geopolitically exposed supply routes.

Whether that strategy succeeds depends on whether Rapidus can deliver competitive performance, yield, and cost at 2-nanometre, a node where even Samsung has faced yield challenges. Design partnerships expand the addressable market, but they do not solve the core technical problem: ramping a cutting-edge process with zero prior high-volume manufacturing experience.

The Economics of Bundled Design and Fabrication

Offering design services alongside fabrication changes the revenue model. Traditional foundries charge per wafer; design fees are a separate line item, often billed by the partner design house. If Rapidus bundles both, it can capture more value per project, but it also assumes more risk. A design that does not meet performance targets, or a product that fails in the market, leaves Rapidus holding both the engineering cost and the unutilised fab capacity.

The bundled model works best when the foundry has deep process insight and can guide design choices early - choosing the right standard-cell library, optimising floor plans for thermal hotspots, co-designing power delivery with the customer's package. TSMC's "3DFabric" and Intel Foundry Services' "co-optimisation" programmes are examples of this approach. Rapidus will need similar capabilities, which means hiring experienced process integration and design-technology co-optimisation engineers, a talent pool that is already stretched thin across the industry.

Pricing will be another test. Custom chips for mid-volume applications - automotive, industrial, edge AI - cannot absorb the same engineering NRE (non-recurring engineering cost) as hyperscale data-centre projects. If Rapidus charges premium rates to recoup its design investment, it may price itself out of the market. If it subsidises design to win orders, it risks unsustainable unit economics.

Open Questions and the 2027 Timeline

Rapidus has stated it will begin pilot production in 2027, with volume manufacturing to follow. Industry observers remain divided. Optimists point to the IBM process technology transfer, government funding, and the concentration of Japanese equipment suppliers as advantages. Sceptics note that process development is not transferable like a recipe; it requires iteration, failure analysis, and yield learning that cannot be rushed.

The design partner network does not change that timeline, but it does signal that Rapidus is thinking beyond the fab itself. A foundry without customers is a liability; a foundry with a pipeline of committed designs - even if those designs are still on paper - has a clearer path to utilisation. The seventeen partners give Rapidus a distribution channel into sectors where TSMC and Samsung have less presence, particularly in Japan's automotive and industrial clusters.

Still, the proof will be in the silicon. The first chips taped out through this network will reveal whether Rapidus and its design partners can navigate the complexity of advanced nodes, and whether customers are willing to bet their product roadmaps on a foundry that has yet to ship a single wafer. In an industry where trust is earned in yield percentages and defect densities, Rapidus is asking for a considerable leap of faith.

For now, the design partnerships are a smart strategic move - expanding the funnel, building relationships, and signalling ambition. Whether they translate into a sustainable business depends on execution in the fabs, a question that will not be answered until the reactors are running and the first lots come out the other end.